The Hardware Side of Cryptography

15 September 2008

Mini-AES In Hardware

Filed under: logic gate — Tags: — edipermadi @ 8:40 am

Mini-AES is mini version of Advanced Encryption Standard created by Raphael Chung as a testbed for crypanalysts studensts. This cipher immitates rijndael in such simple way. It inherits rijndael characteristics.

There are several things to  consider while learning Mini-AES, such multiplication along GF(24), substitution, key scheduling, matrix multiplication, and block XOR. This post will gradually upadeted to give information about Mini-AES in hardware.

First,  Mini-AES multiplication in GF(24) is characterized by polynomial m(x) = x4 + x + 1. In hardware multiplication by 2 and multiplication by 3 are defined by circuits below

Multiplication by 2

Multiplication by 3

The Mix-Column of Mini-AES is defined by circuit below

While Mini-AES substitution as well as its inverse are defined by table below

To derive the functions that define SBOX table, map the table above into K-Map, look for similarity and derive the function one by one. The picture below is the mapping result in K-Map. Cells that marked green, blue and red share common function, while cells that marked orange are unique.

The chart above is characterized by equations below:

To be continue..😀


  1. do you have somthing nice for ECC?
    I need any test vectors to test my design plz;

    Comment by mohamed — 6 March 2009 @ 10:10 pm

RSS feed for comments on this post. TrackBack URI

Leave a Reply

Fill in your details below or click an icon to log in: Logo

You are commenting using your account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s

Create a free website or blog at

%d bloggers like this: