The Hardware Side of Cryptography

1 December 2010

Freescale QorIQ P2020 Security Engine : Talking in Descriptor Language

Filed under: Co-processor, encryption — Tags: , , , , , , — edipermadi @ 8:45 am

This issue will introduce how you talk to Freescale QorIQ P2020 Security Engine. Actually the Freescale Security Engine works in memory map may. You will find a specific region in memory map which reflect the internal structure of Security Engine itself.

The way you talk to Security Engine is about the way you express your cryptographic needs in terms of descriptor. Descriptor is a structure that bundles required cryptographic requirements as well as its arguments. Fortunately, the structure is implementable as a “struct” in C language. This will ease development and reduce your pain. See the following illustration the block diagram of a descriptor.

P2020 Security Engine Descriptor

The content of a descriptor includes a header and 7 pointers. A header is a 64-bits field occupied by descriptor control and descriptor feedback. Descriptor control subfield explains Security Engine which execution unit to be used and which mode should be performed.

Descriptor control subfield also describes the type of descriptor that also explains which pointer fields to be used in terms of current cryptographic context. Descriptor feedback subfield correspond to the write-back process done by Security Engine to indicate that a cryptographic processing is done. For your information, execution unit reflects the algorithm to be used.

The seven unit of 64-bits pointer reflects the arguments to be used in current cryptographic processing. A pointer field contains an actual pointer to incoming or outgoing arguments as well as its length and some little more advance configuration. Please be informed that a descriptor of a cryptographic context may not use the whole seven pointer fields. If the context requires plain text, cipher text, key and iv thus only 4 out of 7 pointers are being used.

In the illustration above, the leftmost bit, which is zero, corresponds to the most significant bit while the rightmost bit, which is sixty three, corresponds to least significant bit. The structure is exactly match on big endian machine which is P2020 itself. I give an example of descriptor in terms of C struct model.


typedef struct desc_hdr_ctrl_t
{
    unsigned int eu_sel0   : 4;
    unsigned int mode0     : 8;
    unsigned int eu_sel1   : 4;
    unsigned int mode1     : 8;
    unsigned int desc_type : 5;
    unsigned int reserved  : 1;
    unsigned int dr        : 1;
    unsigned int dn        : 1;
} DESC_HDR_CTRL_T;

typedef struct desc_hdr_fdbk_t
{
    unsigned int reserved_1 :  3;
    unsigned int iccr0      :  2;
    unsigned int reserved_2 :  6;
    unsigned int iccr1      :  2;
    unsigned int reserved_3 :  3;
    unsigned int id_tag     : 16;
} DESC_HDR_FDBK_T;

typedef struct desc_hdr_t
{
    DESC_HDR_CTRL_T control;
    DESC_HDR_FDBK_T feedback;
} DESC_HDR_T;

typedef struct desc_ptr_t
{
    unsigned int   length   : 16;
    unsigned int   j        : 1;
    unsigned int   extent   : 7;
    unsigned int   reserved : 4;
    unsigned int   eptr     : 4;
    unsigned char *ptr;
} DESC_PTR_T;

typedef struct sec_desc_t
{
    DESC_HDR_T header;
    DESC_PTR_T pointer[7];    
} SEC_DESC_T;

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